The present disclosure generally relates to semiconductor devices, and particularly to field effect transistors employing a replacement gate electrode and a self-aligned dielectric spacer and methods for manufacturing the same.
In a replacement gate integration scheme, a dielectric gate spacer for a field effect transistor is subjected to an etch process during removal of a disposable gate structure. The etch process causes collateral damages to the dielectric gate spacer, which introduces variations in the dimensions in the replacement gate structure that is subsequently formed in a gate cavity. Control of the collateral etch of the dielectric gate spacer during removal of the disposable gate structure to form the gate cavity is difficult because the disposable gate structure typically has a high aspect ratio. Thus, a method for alleviating the difficulties caused by the collateral etch of the dielectric spacer is desired.